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SEMICONDUCTOR
CD54AC541F3A, CD54ACT541F3A
Octal Buffer/Line Driver Three-State, Non-Inverting
Description
The CD54AC541F3A and CD54ACT541F3A are octal buffer/line drivers that utilize the Harris Advanced CMOS Logic technology. The CD54AC541F3A and CD54ACT541F3A are non-inverting three-state buffers having two active-LOW output enables.
July 1998
Features
* This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. * Exceeds 2kV ESD Protection MIL-STD-883, Method 3015 * Meets JEDEC Standard No. 20 * SCR - Latch-Up-Resistant CMOS Process and Circuit Design * Speed of Bipolar FAST/A/S with Significantly Reduced Power Consumption * Functionally and Pin-Compatible with Industry 54 Bipolar Types in the FAST, AS and S Series * Balanced Propagation Delays * Military Operating Temperature Range - Ceramic (CERDIP) 54 Series: . . . . . . . . -55 to 125oC * 24mA Output Drive Current, Drives 75 Lines without Need for Terminations * Fan Out (Over Temperature) - ACL Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2400 - FAST Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 - AS Loads. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 * Operating Voltage - AC Types . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5V to 5.5V - ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
Ordering Information
PART NUMBER CD54AC541F3A CD54ACT541F3A NOTE: 1. Wafer and die for this part number is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information. TEMP. RANGE (oC) -55 to 125 -55 to 125 PACKAGE 20 Ld CERDIP 20 Ld CERDIP PKG. NO. F20.3 F20.3
Pinout
OE1 A0 A1 A2 A3 A4 A5 1 2 3 4 5 6 7 8 9 20 VCC 19 OE2 18 Y0 17 Y1 16 Y2 15 Y3 14 Y4 13 Y5 12 Y6 11 Y7
Functional Diagram
A0 A1 A2 A3 A4 A5 A6 A7 2 3 4 5 6 7 8 9 1 OE1 OE2 19 18 17 16 15 14 13 12 11 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
A6 A7
GND 10
GND = 10 VCC = 20
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
(c) Harris Corporation 1998
File Number
3914.1
1
CD54AC541F3A, CD54ACT541F3A
Absolute Maximum Ratings
DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .50mA DC Output Source or Sink Current per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .50mA DC VCC or Ground Current, ICC or IGND (Note 2) . . . . . . . . .100mA
Thermal Information
Thermal Resistance (Typical, Note 4) JA (oC/W) JC (oC/W) CERDIP Package . . . . . . . . . . . . . . . . 85 24 Maximum Junction Temperature (Hermetic Package or Die) . . . 175oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC (Note 3) AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Slew Rate, dt/dv AC Types 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max) 3.6V to 5.5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max) 4.5V to 5.5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 2. For up to 4 outputs per device, add 25mA for each additional output. 3. Unless otherwise specified, all voltages are referenced to ground. 4. JA is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
TEST CONDITIONS PARAMETER AC TYPES High Level Input Voltage VIH 1.5 3 4.5 5.5 Low Level Input Voltage VIL 1.5 3 4.5 5.5 High Level Output Voltage VOH VIH or VIL -0.05 -0.05 -0.05 -4 -24 -50 (Note 6, 7) 1.5 3 4.5 3 4.5 5.5 1.2 2.1 3.15 (Note 5) 3.85 1.4 2.9 4.4 2.58 3.94 (Note 5) 0.3 0.9 1.35 (Note 5) 1.65 1.2 2.1 3.15 (Note 5) 3.85 1.4 2.9 4.4 2.4 3.7 (Note 5) 3.85 0.3 0.9 1.35 (Note 5) 1.65 V V V V V V V V V V V V V V SYMBOL VI (V) IO (mA) VCC (V) 25oC MIN MAX -55oC TO 125oC MIN MAX UNITS
2
CD54AC541F3A, CD54ACT541F3A
DC Electrical Specifications
(Continued) TEST CONDITIONS PARAMETER Low Level Output Voltage SYMBOL VOL VI (V) VIH or VIL IO (mA) 0.05 0.05 0.05 12 24 50 (Note 6, 7) Input Leakage Current Three-State Leakage Current Quiescent Device Current ACT TYPES High Level Input Voltage Low Level Input Voltage High Level Output Voltage VIH VIL VOH VIH or VIL -0.05 -24 -50 (Note 6, 7) Low Level Output Voltage VOL VIH or VIL 0.05 24 50 (Note 6, 7) Input Leakage Current Three-State or Leakage Current Quiescent Device Current Additional Supply Current per Input Pin TTL Inputs High 1 Unit Load NOTES: 5. Tested 100%. 6. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize power dissipation. 7. Test verifies a minimum transmission-line-drive capability of 75 for 54AC/ACT Series. II IOZ VCC or GND VIH or VIL VO = VCC or GND VCC or GND VCC -2.1 4.5 to 5.5 4.5 to 5.5 4.5 4.5 5.5 4.5 4.5 5.5 5.5 5.5 2 (Note 5) 4.4 3.94 (Note 5) 0.8 (Note 5) 0.1 0.36 (Note 5) 0.1 (Note 5) 0.5 (Note 5) 8 (Note 5) 2.4 2 (Note 5) 4.4 3.7 (Note 5) 3.85 0.8 (Note 5) 0.1 0.5 (Note 5) 1.65 1 (Note 5) 10 (Note 5) 160 (Note 5) 3 V V V V V V V V A A II IOZ VCC or GND VIH or VIL VO = VCC or GND VCC or GND 25oC MIN MAX 0.1 0.1 0.1 0.36 0.36 (Note 5) 0.1 (Note 5) 0.5 (Note 5) 8 (Note 5) -55oC TO 125oC MIN MAX 0.1 0.1 0.1 0.5 0.5 (Note 5) 1.65 1 (Note 5) 10 (Note 5) 160 (Note 5) UNITS V V V V V V A A
VCC (V) 1.5 3 4.5 3 4.5 5.5 5.5 5.5
ICC
0
5.5
-
-
A
ICC ICC
0 -
5.5 4.5 to 5.5
-
-
A mA
3
CD54AC541F3A, CD54ACT541F3A
ACT Input Load Table
INPUT Data OE1, OE2 UNIT LOAD 0.5 1.3
NOTE: Unit load is ICC limit specified in DC Electrical Specifications Table, e.g., 2.4mA max at 25oC.
Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case)
-55oC TO 125oC PARAMETER AC TYPES Propagation Delay, Data to Output tPLH, tPHL 1.5 3.3 (Note 9) 5 (Note 10) Propagation Delay, Enable, Disable to Output tPZL, tPZH 1.5 3.3 5 tPLZ, tPHZ 1.5 3.3 5 Minimum (Valley) VOH During Switching of Other Outputs (Output Under Test Not Switching) Maximum (Peak) VOL During Switching of Other Outputs (Output Under Test Not Switching) Three-State Output Capacitance Input Capacitance Power Dissipation Capacitance ACT TYPES Propagation Delay, Data to Output Propagation Delay, Enable, Disable to Output Minimum (Valley) VOH During Switching of Other Outputs (Output Under Test Not Switching) Maximum (Peak) VOL During Switching of Other Outputs (Output Under Test Not Switching) Three-State Output Capacitance Input Capacitance Power Dissipation Capacitance NOTES: 8. Limits tested 100%. 9. 3.3V Min is at 3.6V, Max si at 3V. 10. 5V Min is at 5.5V, Max is at 4.5V 11. CPD is used to determine the dynamic power consumption per gate. AC: PD = VCC2 fi (CPD + CL) ACT: PD = VCC2 fi (CPD + CL) + VCC ICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage. tPLH, tPHL tPLZ, tPZL, tPZH, tPHZ VOHV See Figure 1 VOLP See Figure 1 CO CI CPD (Note 11) 5 (Note 10) 5 5 2.5 4 4 at 25oC 8.3 (Note 8) 13.4 (Note 8) ns ns V VOHV See Figure 1 VOLP See Figure 1 CO CI CPD (Note 11) 5 3.3 2.3 5.4 3.6 4.5 3.6 4 at 25oC 98 10.9 7.8 (Note 8) 150 18 12 (Note 8) 150 15 12 (Note 8) V ns ns ns SYMBOL VCC (V) MIN TYP MAX UNITS
5
-
1 at 25oC
-
V
-
-
60
15 10 -
pF pF pF
5
-
1 at 25oC
-
V
-
-
60
15 10 -
pF pF pF
4
CD54AC541F3A, CD54ACT541F3A
Burn-In Test Circuit Connections (Use DC II for F3A Burn-In and AC for Life Test)
DC BURN-IN I DC CD54AC/ACT541 OPEN 11-18 GROUND 1-10, 19 VCC (6V) 20 OPEN 11-18 DC BURN-IN II GROUND 10 VCC (6V) 1-9, 19, 20 OSCILLATOR AC CD54AC/ACT541 OPEN GROUND 10 1/2 VCC (3V) 11-18 VCC (6V) 20 50kHz 1, 19 25kHz 2-9
NOTE: Each pin except VCC and Gnd will have a resistor of 2k-47k.
OUTPUT RL (NOTE) 500 DUT OUTPUT LOAD CL 50pF
NOTE: For AC Series Only: When VCC = 1.5V, RL = 1k. CD54AC Input Level Input Switching Voltage, VS Output Switching Voltage, VS VCC 0.5 VCC 0.5 VCC CD54ACT 3V 1.5V 0.5 VCC
FIGURE 1. PROPAGATION DELAY TIMES
All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
Sales Office Headquarters
For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS NORTH AMERICA Harris Semiconductor P. O. Box 883, Mail Stop 53-210 Melbourne, FL 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Harris Semiconductor PTE Ltd. No. 1 Tannery Road Cencon 1, #09-01 Singapore 1334 TEL: (65) 748-4200 FAX: (65) 748-0400
SEMICONDUCTOR
5

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